1. Field of the Invention
The present invention relates to an alignment mark used in electron beam lithography techniques. More particularly, it relates to an alignment mark used in fabrication of fine patterns in a high-density.
2. Description of the Related Art
Since it is indispensable to reduce the gate length for making a field effect transistor having higher performance, a method of lithography which uses an electron beam is employed when fabricating such fine patterns.
FIGS. 4A-4D show an alignment mark used in the conventional electron beam lithography process. FIG. 4A is a top view of a global alignment mark used in relatively rough alignment, and FIG. 4B is a cross sectional view thereof taken along the line 4B--4B. FIG. 4C is a top view of a fine alignment mark used in high-precision alignment which is carried out after the rough alignment, and FIG. 4D is a cross sectional view taken along line 4D--4D. In the drawing, numeral 1301 denotes a metal layer for the global alignment mark, 1304 denotes a semiconductor substrate, 1401 denotes a metal layer for the fine alignment mark, 1402 denotes an electron beam and 1404 denotes a semiconductor substrate. An alignment mark is fabricated generally by forming a cross-shaped metal layer having a convex cross section on a semiconductor substrate.
Such an alignment mark is detected as follows. As shown in FIG. 4D, for example, the electron beam 1402 is scanned over the semiconductor substrate 1404 which is covered with a resist (not shown) and electrons reflected from the semiconductor substrate 1404 and the metal layer 1401 upon irradiation by the electron beam 1402 are detected by means of a detector (not shown), thereby locating the alignment mark position on the basis of the intensity of the reflected electron flux. The electron beam 1402 that has reached the semiconductor substrate 1404 and the metal layer 1401 is discharged outside of the semiconductor substrate through an earth line (not shown in the drawing) or the like which is connected to the semiconductor substrate surface.
Scanning of the electron beam 1402 is usually carried out a plurality of times, with measured data being averaged in order to locate the alignment mark position accurately.
Generally a global alignment mark is formed by depositing a metal layer having a cross shape with a width of 1 .mu.m to 1 mm within a square area measuring 50 .mu.m to 3 mm on one side on a semiconductor substrate. A fine alignment mark is formed by depositing a metal layer having a cross shape with a width of 1 .mu.m to 300 .mu.m within a square area measuring 5 .mu.m to 1 mm on one side on a semiconductor substrate. As semiconductor elements become packaged in increasingly higher density, the size of the area wherein the alignment mark is formed decreases which makes it necessary to decrease the width and length of the alignment ark, as well.
As the alignment mark becomes finer, electrons landing on the alignment mark during irradiation become difficult to move onto the semiconductor substrate, thus making it likely that electrons build up on the alignment mark in the so-called charge-up phenomenon (charge concentration). Such charged-up electrons exert a repulsive force on the incident electron beam, thus making it difficult to detect the alignment mark position accurately.
In order to solve this problem, the present inventors attempted to suppress the effect of charge-up by reducing the number of electron beam scans. With this method, although charge-up can be reduced, the amount of data obtained for locating the alignment mark position decreases thus leading to lower accuracy in locating the alignment mark position, and alignment becomes particularly extremely difficult in sub-micron dimensions which are indispensable for making a T-shaped gate of an HEMT shown in FIG. 3. Thus it was found that this method cannot be applied to the formation of fine patterns in a high density.